TSMC ADR
NYSE:TSMStructural picks-and-shovel position in the AI Semis supply chain, Layer 3. Tier A conviction with research from AI Master Research.
The full 10-section Photoncap on TSMC ADR.
What it physically does · the financial print · customer mix · competitive context · terminal risk · bull case · gap/bear case · optionality · the trade. ~2,024 words. Source: AI Master Research.
What TSM physically does — preview.
One-paragraph version of the Photoncap deep dive. Read the full essay for the complete treatment.
The thesis — preview.
TSMC owns the only sub-5nm logic fab capacity that NVIDIA, AMD, Broadcom, Marvell, Apple, Qualcomm, MediaTek and the AI custom-silicon cohort can physically use to build product through 2027 — the cleanest, deepest moat in the cycle, with capex guided to the high end of $52-56B and the eighth straight beat-and-raise just confirmed. TSMC manufactures the leading-edge logic wafers — N5, N4P, N3E, N3P, and starting H2 2026 the N2 node with gate-all-around (GAA) nanosheet transistors — that every AI silicon design house ultimately depends on for production. The Hsinchu, Tainan, Kaohsiung, and increasingly Arizona and Kumamoto fabs collectively process roughly 90% of the world's sub-7nm wafers. NVIDIA Blackwell is N4P. NVIDIA Rubin is N3P moving to N2. AMD MI355X is N3E. Apple M5 / M6 and A19 / A20 are N3E moving to N2. Every meaningful AI silicon program — Google TPU, Meta MTIA, AWS Trainium, Microsoft Maia, the OpenAI Titan if/when it ships — is fabricated at TSMC. There is no alternative at the leading edge that can absorb material volume — Samsung Foundry's 3nm process has yield and customer-traction problems that have persisted for three years; Intel 18A is just beginning to ship p…