Astera Labs
NASDAQ:ALABStructural picks-and-shovel position in the AI Semis supply chain, Layer 5. Tier A conviction with research from AI Master Research.
The full 10-section Photoncap on Astera Labs.
What it physically does · the financial print · customer mix · competitive context · terminal risk · bull case · gap/bear case · optionality · the trade. ~2,161 words. Source: AI Master Research.
What ALAB physically does — preview.
One-paragraph version of the Photoncap deep dive. Read the full essay for the complete treatment.
The thesis — preview.
Astera Labs is the open-standards UALink and CXL connectivity pure-play just out of a +93% YoY quarter — own it as the agentic-AI back-end network play, the structural alternative to Nvidia's NVLink moat, and the cleanest exposure to the AMD MI400 ramp at the four major hyperscalers. Astera makes the silicon that connects AI accelerators to each other and to memory across the back-end of the data centre fabric — specifically PCIe retimers, CXL memory expanders and now the Scorpio X-Series of switch silicon that anchors the UALink open-standards alternative to Nvidia's NVLink. In a frontier AI training cluster, every GPU sits inside a node that connects to seven other GPUs via NVLink (Nvidia's proprietary fabric); those nodes then connect to other nodes via the back-end network. Astera's silicon is in that back-end interconnect path for every non-Nvidia accelerator family — AMD MI355X/MI400, Intel Gaudi, AWS Trainium, Microsoft Maia, Google TPU — and increasingly inside Nvidia-based clusters too for PCIe-class peripheral connectivity and CXL memory pooling.…